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TrilithICTM BTS 780 GP 1 Overview Features * * * * Quad switch driver Free configureable as bridge or quad-switch Optimized for DC motor management applications Ultra low RDS ON @ 25 C: High-side switch: typ. 34 m, P-TO263-15-1 Low-side switch: typ. 15 m High peak current capability of typ. 44 A @ 25 C Low quiescent current of typ. 15 A @ 25 C SMD-Power-Package, optimized for small size and thermal performance Load and GND-short-circuit-protected Operates up to 36 V 2-Bit status flag diagnosis Overtemperature shut down with hysteresis Short-circuit detection and diagnosis Open-load detection and diagnosis C-MOS compatible inputs Internal clamp diodes Isolated sources for external current sensing Over- and under-voltage detection with hysteresis Fast low-side switches for PWM Ordering Code Q67006-A9320 Package P-TO263-15-1 * * * * * * * * * * * * * * Type BTS 780 GP Description The BTS 780 GP is part of the TrilithIC family containing one double high-side switch and two low-side switches in one P-TO263-15-1 package. "Silicon instead of heatsink" becomes true The ultra low RDS ON of this device avoids power dissipation. It saves costs in mechanical construction and mounting and increases the efficiency. Data Sheet 1 1999-06-22 BTS 780 GP The high-side switches are produced in the SMART SIPMOS(R) technology. They are fully protected and contain the signal conditioning circuitry for diagnosis (the comparable standard high-side product is the BTS 734L1). For minimized RDS ON the two low-side switches are produced in S-FET logic level technology (the comparable standard product is the BUZ 100SL). Each drain of these three chips is mounted on separated leadframes (see Figure 1). The sources of all four power transistors are connected to separate pins. So the BTS 780 GP can be used in H-Bridge configuration as well as in any other switch configuration. Moreover, it is possible to add current sense resistors. All these features open a broad range of automotive and industrial applications. Data Sheet 2 1999-06-22 BTS 780 GP Molding Compound SL1 SL1 GL1 GND GH1 ST1 SH1 DHVS GND GH2 ST2 SH2 SL2 SL2 GL2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 AEP02224 Heat-Slug 1 18 DL1 Heat-Slug 2 17 DHVS Heat-Slug 3 16 DL2 Figure 1 Pin Configuration (top view) Data Sheet 3 1999-06-22 BTS 780 GP Pin Definitions and Functions Pin No. 1, 2 3 4, 9 5 6 7 8, 17 10 11 12 13, 14 15 16 18 Symbol SL1 GL1 GND GH1 ST1 SH1 DHVS GH2 ST2 SH2 SL2 GL2 DL2 DL1 Function Source of low-side switch 1 Gate of low-side switch 1 Ground Gate of high-side switch 1 Status of high-side switch 1; open Drain output Source of high-side switch 1 Drain of high-side switches and power supply voltage Heat-Slug 2 or Heat-Dissipator Gate of high-side switch 2 Status of high-side switch 2; open Drain output Source of high-side switch 2 Source of low-side switch 2 Gate of low-side switch 2 Drain of low-side switch 2 Heat-Slug 3 or Heat-Dissipator Drain of low-side switch 1 Heat-Slug 1 or Heat-Dissipator Bold type: Pin needs power wiring. Data Sheet 4 1999-06-22 BTS 780 GP ST1 6 DHVS 8, 17 ST2 11 Diagnosis Biasing and Protection GH1 5 R1 0 0 1 1 Driver IN 0 1 OUT L L RO1 RO2 12 SH2 LH GH2 10 RI2 0HL 1HH 16 DL2 SH1 DL1 GND 4, 9 7 18 GL1 3 GL2 15 1, 2 SL1 13, 14 SL2 AEB02225 Figure 2 Block Diagram Data Sheet 5 1999-06-22 BTS 780 GP 2 2.1 Circuit Description Input Circuit The control inputs GH1,2 consist of TTL/CMOS compatible Schmitt-Triggers with hysteresis. Buffer amplifiers are driven by these stages and convert the logic signal into the form necessary for driving the power output stages. The inputs are protected by ESD clamp-diodes. The inputs GL1 and GL2 are connected to a standard N-channel logic level power-MOS gate. 2.2 Output Stages The output stages consist of an ultra low RDS ON Power-MOS H-Bridge. Protective circuits make the outputs short-circuit proof to ground and load short-circuit proof. In Hbridge configuration, the D-MOS body-diodes can be used for freewheeling when commutating inductive loads. If the high-side switches are used as single switches, positive and negative voltage spikes which occur when driving inductive loads are limited by integrated power clamp diodes (c.f. BTS 734L1 datasheet for a detailed description). 2.3 Short-Circuit Protection (valid only for the high-side switches) The outputs are protected against - output short circuit to ground, and - overload (load short circuit). An internal OP-Amp controls the Drain-Source-Voltage of the HS-Switches by comparing the DS-Voltage-drop with an internal reference voltage. Above this trippoint the OP-Amp reduces the output current depending on the junction temperature and the drop voltage. In the case of an overloaded high-side switch the corresponding status output is set to low. If the HS-Switches are in OFF-state-Condition internal resistors RO1,2 from SH1,2 to GND pull the voltage at SH1,2 to low values. On each output pin SH1 and SH2 an output examiner circuit compares the output voltages with the internal reference voltage VEO. This results in switching the corresponding status output to low if the source voltage in OFF-Condition is higher then VEO. In H-Bridge condition this feature can be used to protect the low-side switches against short circuit to VS during the OFF-period. 2.4 Overtemperature Protection (valid only for the high-side-switches) The chip also incorporates an overtemperature protection circuit with hysteresis which switches off the output transistors and sets the status output to low. Data Sheet 6 1999-06-22 BTS 780 GP 2.5 Under-Voltage-Lockout (UVLO) When VS reaches the switch-on voltage VUV ON the IC becomes active with a hysteresis. The High-Side output transistors are switched off if the supply voltage VS drops below the switch off value VUV OFF. 2.6 Over-Voltage-Lockout (OVLO) When VS reaches the switch-off voltage VOV OFF the High-Side output transistors are switched off with a hysteresis. The IC becomes active if the supply voltage VS drops below the switch-on value VOV ON. 2.7 Open Load Detection Open load is detected by current measurement in the High-Side switches during ONcondition. If the output current drops below an internally fixed level (open circuit detection current) the error flag is set with a delay. 2.8 Status Flag The status flag outputs are open drain outputs with Zener-diodes which require pull-up resistors, c.f. the application circuit on Page 16. Various errors as listed in the table "Diagnosis" are detected by switching the open drain outputs ST1 or ST2 to low. Data Sheet 7 1999-06-22 BTS 780 GP 3 Flag Truthtable and Diagnosis (valid only for the High-Side-Switches) GH1 0 0 1 1 0 0 1 0 1 X 0 0 1 0 1 X GH2 0 1 0 1 0 1 X 0 0 1 0 1 X 0 0 1 X X 0 1 0 1 X X SH1 L L H H Z Z H L H X H H H L H X L L X X L L L L SH2 L H L H L H X Z Z H L H X H H H X X L L L L L L ST1 ST2 Remarks 1 1 1 1 1 1 0 1 1 1 0 1 1 1 1 1 1 0 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 1 1 1 0 1 1 1 1 1 0 1 0 0 1 stand-by mode switch1 active switch2 active both switches active Inputs Normal operation; identical with functional truth table Outputs Open load at high-side switch1 detected Open load at high-side switch2 detected detected Short circuit to DHVS at high-side switch1 Short circuit to DHVS at high-side switch2 detected Overtemperature high-side switch1 0 1 Overtemperature high-side switch2 X X Overtemperature both high-side switch Over- and Under-Voltage 0 X 1 X detected detected detected detected not detected Inputs: 0 = Logic LOW 1 = Logic HIGH X = don't care Outputs: Z = Output in tristate condition L = Output in sink condition H = Output in source condition X = Voltage level undefined Status: 1 = No error 0 = Error Data Sheet 8 1999-06-22 BTS 780 GP 4 4.1 Characteristics Absolute Maximum Ratings Symbol Limit Values min. max. Unit Remarks - 40 C < Tj < 150 C Parameter High-Side-Switches (Pins DHVS, GH1,2 and SH1,2) Supply voltage HS-drain current HS-input current HS-input voltage Status Output ST Status Output current VS IDHS IGH VGH - 0.3 - 30 -2 - 10 43 * 2 16 V A mA V - * internally limited Pin GH1 and GH2 Pin GH1 and GH2 IST -5 5 mA Pin ST1 and ST2 Low-Side-Switches (Pins DL1,2, GL1,2 and SL1,2) Break-down voltage LS-drain current LS-drain current LS-input voltage Temperatures Junction temperature Storage temperature V(BR)DSS IDLS IDLS VGL 50 - - - 10 - 30 50 14 V A A V VGS = 0 V; ID 1 mA - t < 1 ms; < 0.1 Pin GL1 and GL2 Tj Tstg - 40 - 50 150 150 C C - - Note: Maximum ratings are absolute ratings; exceeding any one of these values may cause irreversible damage to the integrated circuit. Data Sheet 9 1999-06-22 BTS 780 GP 4.2 Operating Range Symbol Limit Values min. max. V V V mA C C After VS rising above VUV ON - - Pin ST1 or ST2 - - Unit Remarks Parameter Supply voltage Input voltages Input voltages Status output current HS-junction temperature LS-junction temperature VS VGH VGL IST TjHS TjLS VUV OFF 36 - 0.3 -9 0 - 40 - 40 15 13 2 150 150 Note: In the operating range the functions given in the circuit description are fulfilled. 4.3 Thermal Resistances (one HS-LS-Path active) Symbol Limit Values min. LS-junction case HS-junction case Junction ambient max. 0.5 0.5 21 K/W measured to pin 16 or 18 K/W measured to pin 17 K/W measured on test PCB1) - - - Unit Remarks Parameter RthjCLS RthjCHS Rthja 1) Device on 50 mm x 33 mm epoxy PCB with 6 cm2 cooling-area in free air. C.f. PCB description on Page 17 Data Sheet 10 1999-06-22 BTS 780 GP 4.4 Electrical Characteristics ISH1 = ISH2 = ISL1 = ISL2 = 0 A; - 40 C < Tj < 150 C; 8 V < VS < 18 V unless otherwise specified Parameter Symbol Limit Values min. Current Consumption Quiescent current typ. max. Unit Test Condition IS - 15 30 A GH1 = GH2 = L VS = 13.2 V Tj = 25 C Quiescent current Supply current Supply current IS IS IS - - - - 2 4 42 4 8 A mA mA GH1 = GH2 = L VS = 13.2 V GH1 or GH2 = H GH1 and GH2 = H Under-Voltage-Lockout (UVLO) VUV ON VUV OFF Switch-OFF voltage Switch ON/OFF hysteresis VUV HY Switch-ON voltage Over-Voltage-Lockout (OVLO) - 3.5 - 5.2 4.2 1 7 5.0 - V V V VS increasing VS decreasing VUV ON - VUV OFF VOV OFF VOV ON Switch-ON voltage Switch OFF/ON hysteresis VOV HY Switch-OFF voltage 36 35 - - - 0.5 43 - - V V V VS increasing VS decreasing VOV OFF - VOV ON Data Sheet 11 1999-06-22 BTS 780 GP 4.4 Electrical Characteristics (cont'd) ISH1 = ISH2 = ISL1 = ISL2 = 0 A; - 40 C < Tj < 150 C; 8 V < VS < 18 V unless otherwise specified Parameter Symbol Limit Values min. High-Side-Switches 1, 2 Static drain-source on-resistance Static drain-source on-resistance Leakage current typ. max. Unit Test Condition RDS ON H - RDS ON H - - - - - - 34 - - 0.8 0.7 0.5 - 40 75 10 1.2 1.1 0.8 10 m m A V V V mA ISH = 2 A Tj = 25 C ISH = 2 A VGH = VSH = 0 V Tj = - 40 C Tj = 25 C Tj = 150 C IFH = 2 A IHSLK Body-diode forward-voltage VFH @ IFH = 2 A VFH VFH ILKCL Clamp-diode leakagecurrent (IFH + ISH) Short Circuit to GND Initial peak SC current Initial peak SC current Initial peak SC current Initial peak SC current Short Circuit to VS OFF-state examinervoltage Output pull-down-resistor Open Circuit Detection current ISCP ISCP ISCP ISCP 47 35 29 21 55 44 36 27 66 54 45 34 A A A A Tj = - 40 C Tj = 25 C Tj = 85 C Tj = 150 C VEO RO 2 4 3 10 4 30 V k VGH = 0 V - IOCD 0.05 - 1.2 A - Data Sheet 12 1999-06-22 BTS 780 GP 4.4 Electrical Characteristics (cont'd) ISH1 = ISH2 = ISL1 = ISL2 = 0 A; - 40 C < Tj < 150 C; 8 V < VS < 18 V unless otherwise specified Parameter Symbol Limit Values min. Switching Times Switch-ON-time; to 90% VSH Switch-OFF-time; to 10% VSH Control Inputs GH 1, 2 H-input voltage threshold L-input voltage threshold Input voltage hysteresis H-input current L-input current Input series resistance Zener limit voltage Low-Side-Switches 1, 2 Static drain-source on-resistance Static drain-source on-resistance Leakage current typ. max. Unit Test Condition tON tOFF - - 130 260 300 450 s s 12 resistive load VS = 13.2 V 12 resistive load VS = 13.2 V VGHH VGHL VGHHY IGHH IGHL RI VGHZ - 1.5 - 20 4 2.5 5.4 2.8 2.3 0.5 50 25 4.2 6.1 3.3 - - 90 50 6 - V V V A A k V - - - VGH = 5 V VGH = 0.4 V - IGH = 1.6 mA RDS ON L - 15 20 m RDS ON L - ILKL - - - - - <1 0.8 0.7 0.5 35 100 1.2 1.1 0.8 m A V V V ISL = 2 A VGL = 5 V Tj = 25 C ISH = 2 A VGL = 0 V VDS = 18 V Tj = - 40 C Tj = 25 C Tj = 150 C Body-diode forward-voltage VFL @ IFL = 2 A V FL VFL Data Sheet 13 1999-06-22 BTS 780 GP 4.4 Electrical Characteristics (cont'd) ISH1 = ISH2 = ISL1 = ISL2 = 0 A; - 40 C < Tj < 150 C; 8 V < VS < 18 V unless otherwise specified Parameter Symbol Limit Values min. Control Inputs GL1, 2 Gate-threshold-voltage Transconductance typ. max. Unit Test Condition VGL(th) gfs 0.6 - 1.6 5 2.4 - V S VGL = VDSL IDL = 130 A VDSL = 20 V; IDL = 20 A Status Flag Output ST Low output voltage Leakage current Zener-limit-voltage Thermal Shutdown Thermal shutdown junction TjSD temperature Thermal switch-on junction TjSO temperature Temperature hysteresis T 160 150 - - - 10 190 180 - C C C - - T = TjSD - TjSO VSTL ISTLK VSTZ - - 5.4 0.3 0.4 6.1 0.6 2 - V A V IST = 1.6 mA VST = 5 V IST = 1.6 mA Note: Shutdown temperatures are guaranteed by design Data Sheet 14 1999-06-22 BTS 780 GP IS CS 470 nF DHVS 8, 17 CL 100 F VS=12 V IFH1, 2 ST1 6 VST1 VSTL1 VSTZ1 ST2 11 Diagnosis Biasing and Protection VST2 VSTL2 VSTZ2 GH1 5 R1 0 VGH1 GH2 10 VGH2 GND 4, 9 RI2 0 1 1 Driver IN 0 1 OUT L L RO1 RO2 12 SH2 16 DL2 7 SH1 18 DL1 LH ISH2 VDSH2 -VFH2 VDSH1 -VFH1 0HL 1HH VUVON VUVOFF IDL2, ILKL ISH1 IDL1, ILKL GL1 3 VGL1 VGL(th)1 GL2 15 VGL2 VGL(th)2 ISL1 1, 2 SL1 13, 14 SL2 VEO1 VDSL1 -VFL1 VEO2 VDSL2 -VFL2 ISL2 AES0226 Figure 3 Test Circuit Named during Open Circuit Named during Leakage-Cond. HS-Source-Current Named during Short Circuit ISH1,2 ISCP IOCD IHSLK Data Sheet 15 1999-06-22 BTS 780 GP Watchdog Resest Q RQ 100 k WD R VCC RQ 100 k D CQ 22 F CD 47 nF DHVS 8, 17 GND D1 Z39 CS 10 F TLE 4278G DO1 1N4001 VS=12 V RS ST1 6 10 k RS 10 k Biasing and Protection ST2 11 Diagnosis GH1 5 R1 0 Driver IN 0 1 0 OUT L L RO1 RO2 12 SH2 LH P GH2 10 RI2 1 1 0HL 1HH 16 DL2 M GND 4, 9 7 SH1 18 DL1 GL1 3 GL2 15 GND 1, 2 SL1 13, 14 SL2 AES02227 Figure 4 Application Circuit Data Sheet 16 1999-06-22 BTS 780 GP 5 Test-PCB The Printed Circuit Board is made of 1.5 mm thick standard FR4 material with double sided copper plating of 35 m thickness. The 28 mm x 21 mm cooling area is throughconnected by a 1.1 mm x 1.1 mm pattern of vias with 0.5 mm diameter. BOTTOM Application Board for High-Current-Motorbridge TOP (component side) BTS78XLPMini1.1 21 DL1 SL1 DHVs SL1 DL2 28 Dimensions in mm 34 AEA02732 Figure 5 6 Test-PCB Outline Solder Pad for Reflow Soldering P-TO263-15-1 (Plastic Transistor Single Outline Package) 21.6 0.8 8.4 16 9.5 50 HL LH TM3 0.4 1 Dimensions in mm Data Sheet 17 1999-06-22 HLG09223 4 BTS780 Str BTS 780 GP 7 Package Outlines P-TO263-15-1 (Plastic Transistor Single Outline Package) 21.6 0.2 10.2 8.3 1) 1.27 0.1 B A 0.1 0.05 8.18 0.15 4.4 5.56 0.15 4.8 1) 10.3 8.21) (15) 9.25 0.2 8.41) 2.4 14x1.4 0...0.15 0.8 0.1 4.7 0.5 2.7 0.3 0.5 0.1 8 max. 0.25 1) M AB 0.1 GPT09151 Typical All metal surfaces tin plated, except area of cut. Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information". SMD = Surface Mounted Device Data Sheet 18 Dimensions in mm 1999-06-22 |
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